1. Field of the Invention
The present invention relates to a cell switching device and more particularly to a cell switching device capable of effecting hit-less switching between an active system and a standby system, i.e., a cell switching system ZERO and a cell switching system ONE.
2. Description of the Background Art
An exchange, transmission apparatus or similar communication apparatus installed in a telephone central office or similar communication facility handles a great number of subscriber signals at all times. It is a common practice to provide the major part of such a communication apparatus with a duplex circuit configuration for promoting rapid trouble shooting and easy maintenance. Particularly, a switch portion on which all the subscriber information center is, in many cases, arranged to effect hit-less switching with the duplex circuit configuration.
Today, an ATM (Asynchronous Transfer mode) communication system is extensively used as a communication system capable of promoting the effective use of limited channel resources and easy management. In the ATM communication system, data are separated into cells, or short packets, each having a fixed length of fifty-three bytes and are transferred on a cell-by-cell basis. The number of cells to be sent is dependent upon by the amount of information while a particular number is assigned to each cell for an address management purpose. This kind of system is therefore efficient if a number of calls share a single physical transmission path and a single switch.
An STM (Synchronous Transfer Mode) system, which is another conventional communication system, allows a channel once seized to maintain a preselected information transfer capacity. Specifically, in the STM system, a periodic frame having a preselected duration is formatted and divided into equal short time slots. Signals on different channels each is inserted in a particular time slot and transmitted. A receiving station distinguishes the channels on the basis of information representative of the positions (phases) on the channels in the frame. The STM system is feasible for a telephone network or similar fixed network transferring information as substantially even units and allowing a traffic characteristic to be determined.
Hit-less switching has customarily been effected with a switch using, e.g., the STM system, as follows. The switch is a spatial switch. A plurality of pieces of information to be transferred are multiplexed by a TDM (Time Division Multiplex) scheme on each of a plurality of signal lines each having a particular frequency band. At the outside of the switch, a selecting section switches the information occurring in the same time slot and thereby delivers any desired input signal to the output.
FIG. 37 shows a specific conventional hit-less switching system. As shown, the switching system is generally made up of a system ZERO and a system ONE. The system ZERO includes an input port 600. Assume that in the input port 600 pieces of information to be transferred are inserted in time slots respectively assigned to, e.g., customers A-I, as named from the head to the tail of the frame. Also, the system ZERO includes an output port 602 in which a particular time slot is assigned to each of, e.g., customers xcex1-, as counted from the head to the tail.
In the above condition, a selecting section 610 included in a switch 608 belonging to the system ZERO is controlled to send, e.g., the signal of the customer D to the customer xcex1 or the signal of the customer H to the customer xcex2. The system ONE, which is another redundant system, also includes a switch 614 having a selecting section 612, an input port 616, and an output port 618. The input port 616 and output port 618 are identical in signal assignment with the input port 600 and output port 602, respectively. To effect hit-less switching between the systems ZERO and ONE, it is necessary that the contents of control over the switches 608 and 614 be exactly the same.
The prerequisite with switching between the systems ZERO and ONE is that all the factors, including the phases of output signals, be exactly the same. In the specific configuration shown in FIG. 37, a phase difference, for example, apt to occur for production reasons may be successfully absorbed if the output signal is temporarily stored in, e.g., a bit buffer.
However, the circuitry shown in FIG. 37 has the following problems as to hit-less switching when applied to the ATM system. To begin with, an ATM cell is provided with numbers designating a source and a destination. A selecting section determines whether or not to take in the ATM cell by identifying the numbers attached to the cell, instead of executing control based on a time slot. Moreover, ATM cells so taken in as a sequence are not always arranged at preselected intervals. The cells therefore must be temporarily stored in a queue circuit in order to uniform the intervals, as needed. Generally, with a queue circuit, it is necessary to uniform the cell intervals by sophisticated control.
Particularly, shapers for uniforming the cell intervals for each of a great number of customers need sophisticated control in many cases. It is likely that only one of the two systems ZERO and ONE is initialized due to a momentary error ascribable to maintenance work or noise. This would prevent the two systems from operating in unison thereafter and would cause the influence of such a condition to remain for a certain period time.
On the other hand, data for control are sometimes calculated in order to meet various traffic control demands. For example, an ABR (Available Bit Rate) which is a dynamically variable bit rate is controlled in order to control a cell rate. For ABR control, a transfer bit rate is dynamically varied in accordance with the operating condition of a network. In this case, the momentary inconformity between the cell sequences of the systems ZERO and ONE affects the result of calculation of the data for ABR control. As a result, the result of calculation differs from the system ZERO to the system ONE, obstructing accurate and adequate ABR control.
It is therefore an object of the present invention to provide a hit-less cell switching device capable of switching ATM cells between two systems ZERO and ONE with a simple construction, and executing accurate ABR control despite hit-less switching.
In accordance with the present invention, a cell switching device includes first cell switching circuitry including a first input port for receiving cells for ATM communication, and a first cell switch including a queue circuit for temporarily storing the cells. The first cell switch outputs the cells from said queue circuit to a first output port matching with a transfer route. Second cell switching circuitry includes a second input port for receiving cells for ATM communication, and a second cell switch including a queue circuit for temporarily storing the cells. The second cell switch outputs the cells from the queue circuit to a second output port matching with a transfer route. The first cell switching circuitry further includes a first cell gate for selectively passing the cells received to the first input port or blocking the cells, a first shaper including a queue circuit for temporarily storing the cells output from the first output port to thereby adjust intervals between the cells to be transferred, and a second cell gate for selectively passing the cells output from the first shaper or blocking the cells. The second cell switching circuitry further includes a third cell gate for selectively passing the cells received to the second input port or blocking the cells, a second shaper including a queue circuit for temporarily storing the cells output from the second output port to thereby adjust intervals between the cells to be transferred, and a fourth cell gate for selectively passing the cells output from the second shaper or blocking the cells. The first cell gate and the third cell gate have a common input connected to receive cells. When either one of the first and second cell switching circuitry is held in an active state, the other of the first and second cell switching circuitry is held in a standby state. A cell outputting circuit selects and outputs the cells output from either one of the second and fourth cell gates held in an active state. A controller controls the passage of the cells through the first to fourth cell gates and controls the first and second cell switches and the first and second shapers to thereby effect hit-less switching from the one cell switching circuitry held in the active state to the other cell switching circuitry held in the standby state.